For use in circuits such as continuous-time integrators and continuous-time filters, there is a need for a circuit element or network which acts as a transconductor whose transconductance can be voltage-tuned, and several proposals are described in the literature directed to such ends. It is particularly advantageous that this network be linear over its dynamic range.
Typically these transconductors involve MOS transistors operating in saturation where the transconductance is related to the difference between the source-gate voltage and the threshold voltage of the transistors. To compensate for fabrication tolerances and temperature variations in the filter as a whole, this difference must be permitted to vary by a factor of two to three typically. This results in a permitted variation of drain current of between four and nine times. Because in these circuits this current is carried by other devices in series with the mentioned transconductor devices, other voltage drops in the circuit also vary. Moreover, in a practical case, the circuits must be designed so that these variations are accommodated with a limited power supply. As a consequence, such proposed transconductors suffer from limited signal-handling capability, and so have a small dynamic range and are subject to significant transconductance mismatch because of threshold voltage variations among the transistors making up the network. This results in undesirably high levels of total harmonic distortion over normal operating ranges. The present invention seeks to improve over these proposals.
It is currently well known to employ a field effect transistor (FET) as a voltage-variable transconductor using the gate voltage for tuning the transconductance. It has also been recognized that in such a transconductor the transconductance available between the two current-bearing terminals of the FET is subject to large even-order non-linearities. To reduce such non-linearities, it has been proposed to connect the FET between a pair of transistors, as shown in FIG. 1, to reduce the non-lineariaties. This circuit will be discussed in more detail below. However, this arrangement results merely in the reduction of the even-order non-linearities, with little effect on the odd-order non-linearities, so that the transconductance is still subject to significant non-linearities.
The present invention seeks to reduce such odd-order linearities to improve the linearity of the transconductance.